NachhaltigF: Angewandte Naturwissenschaften und WirtschaftsingenieurwesenS: TC Teisnach Sensorik
Günther Ruhl, W. Lehnert, M. Lukosius, C. Wenger, C. Baristiran Kaynak, T. Blomberg, S. Haukkac, P. Baumann, W. Besling, A. Roeste, B. Riou, S. Lhostif, A. Halimaou, F. Roozeboom, E. Langereis, W.M.M. Kessels, A. Zauner, S. Rushworth
Dielectric Material Options for Integrated Capacitors
ECS Journal of Solid State Science and Technology, vol. 3, no. 8
Future MIM capacitor generations will require significantly increased specific capacitances by utilization of high-k dielectric materials. In order to achieve high capacitance per chip area, these dielectrics have to be deposited in three-dimensional capacitor structures by ALD or AVD (atomic vapor deposition) process techniques. In this study eight dielectric materials, which can be deposited by these techniques and exhibit the potential to reach k-values of over 50 were identified, prepared and characterized as single films and stacked film systems. To primarily focus on a material comparison, preliminary processes were used for film deposition on planar test devices. Measuring leakage current density versus the dielectric constant k shows that at low voltages (≤1 V) dielectrics with k-values up to 100 satisfy the typical leakage current density specification of <10−7 A/cm2 for MIM capacitors. At higher voltages (3 V) this specification is only fulfilled for dielectrics with k-values below 45. As a consequence, the maximum achievable capacitance gain by introducing high-k dielectrics depends on the operating voltage of the application, such as DRAM capacitors or RF and blocking capacitors. To meet the reliability requirements for RF and blocking capacitors, high-k dielectric film thicknesses of up to 50 nm are necessary.